IP FMCW Cores for STRATIX Altera

The following set of IPs permits to implement in a single STRATIX II (Altera) FPGA chip the signal processing required to implement an imaging radar system with continuous sample rate up to 100 Msps.

  • IF sampling: 100 Msps FMCW AD-DA core
  • IF Processing: DC removal, FIR, IIR, Windowing, Zero Padding
  • Radar Image reconstruction (space domain):
    • 1K to 16K FFT core with bit reverser in FPGA memory
    • 32K to 128K FFT core with bit reverser in on board memory
    • RCS measurement
  • Radar Image processing (could be 1-D, 2-D and 3-D):
    • Target finding and tagging
    • radar images Interpolation in Different Space Domains

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